<div dir="ltr"><div>Hi Mark,<br><br>There are other people interested in this as well since as you point out it can be a bit of a waste to move data from the GPU to the CPU and then back to the GPU. I don't know anyone that is working on this problem yet either but it will be a necessary improvement that eventually should be done. Hopefully it's just an SBIR or STTR away :)<br>
<br></div>Andy<br></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Tue, Aug 20, 2013 at 3:57 PM, David E DeMarle <span dir="ltr"><<a href="mailto:dave.demarle@kitware.com" target="_blank">dave.demarle@kitware.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">I am not sure if anyone has tried putting Piston and Coprocessing together yet. If so I would like to hear about it. If not and someone is trying, I wouldn't mind getting involved in that effort.<div>
<br>
</div><div>But yes Mark you are right. As it stands there will be a round trip in between the simulation and vis stages. We will have to extend Catalyst with the ability to create a vtkPistonDataObject that refers to the data already on the GPU in order to avoid it.</div>
<div><br></div><div><br></div><div><br><div><br></div><div><br><div> </div></div></div></div><div class="gmail_extra"><br clear="all"><div>David E DeMarle<br>Kitware, Inc.<br>R&D Engineer<br>21 Corporate Drive<br>Clifton Park, NY 12065-8662<br>
Phone: <a href="tel:518-881-4909" value="+15188814909" target="_blank">518-881-4909</a></div>
<br><br><div class="gmail_quote"><div><div class="h5">On Tue, Aug 20, 2013 at 12:45 PM, Vanmoer, Mark W <span dir="ltr"><<a href="mailto:mvanmoer@illinois.edu" target="_blank">mvanmoer@illinois.edu</a>></span> wrote:<br>
</div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="h5">
<div link="blue" vlink="purple" lang="EN-US">
<div>
<p class="MsoNormal">Hello, for a CUDA application with coprocessing, is it correct that between a simulation step and coprocessing that the data will make a roundtrip from the device to the host and back to the device, since parts of the vis pipeline run on
the CPU?<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Can Piston work with coprocessing, would that avoid this round-trip?
<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">How about for Xeon Phis?<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Thanks,<u></u><u></u></p>
<p class="MsoNormal">Mark<u></u><u></u></p>
</div>
</div>
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