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<p class="MsoNormal">Hello, for a CUDA application with coprocessing, is it correct that between a simulation step and coprocessing that the data will make a roundtrip from the device to the host and back to the device, since parts of the vis pipeline run on
the CPU?<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Can Piston work with coprocessing, would that avoid this round-trip?
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">How about for Xeon Phis?<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks,<o:p></o:p></p>
<p class="MsoNormal">Mark<o:p></o:p></p>
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